The use of plasma display monitors has recently expanded into the area of color display monitors which offer drastically slimmer units. Plasma display monitors employ a subfield method for displaying half tone, as disclosed in Japanese Laid-open Patent No. H4-195087. In DC plasma display monitors, for example, their driving method may require display data write and sustaining periods as disclosed in Japanese Laid-open Patent No. H6-12988. Configuration of a video display monitor of the prior art is explained next with reference to FIGS. 15, 16, and 17.
FIG. 15 shows the configuration of a video display monitor of the prior art employing a single scanning system driving method. The conventional video display monitor comprises a synchronizing signal separator 1 for separating the video signal, a timing pulse generator 2 for producing a timing pulse in accordance with the synchronizing signal separated by the synchronizing signal separator 1, an A/D converter 3 for converting the video signal to digital signal, a subfield processor 4, a frame memory 5 required for the subfield processor 4, a DC plasma display panel 9, an anode driving circuit 6 for the DC plasma display panel 9, a cathode driving circuit 7, and an auxiliary anode driving circuit 8.
In the video display monitor as configured above, the A/D converter 3 converts the video signal to a digital signal, and outputs the digital signal to the subfield processor 4. At the same time, the synchronizing signal separator 1 separates the synchronizing signal from the video signal. The timing generator 2 produces a timing pulse required in the subfield processor 4 and A/D converter 3 in accordance with the synchronizing signal output from the synchronizing signal separator 1. The subfield processor 4 implements the following operations with the frame memory 5.
The subfield processor 4 divides one field of the video signal into multiple subfields in order to display grey levels of the video signal, and outputs a required signal to the cathode driving circuit 7 and auxiliary anode driving circuit 8. The subfield processor 4 also converts the input video digital signal for obtaining grey levels of the video signal using the subfield method, and supplies the converted signal to the anode driving circuit 6. A group of anode electrodes is connected in the vertical direction of the screen to each of the multiple anode electrode terminals. Similarly, a group of auxiliary anode electrodes is connected in the vertical direction of the screen to each of multiple auxiliary anode electrode terminals. A group of cathode electrodes is connected in the horizontal direction of the screen to each of the multiple cathode electrode terminals. A line created by connecting these cathode electrodes horizontally is called a scanning line hereafter.
FIGS. 16A to 16E show waveforms of driving circuits of a plasma display panel 9. These figures explain the relation between a signal (pulse) applied to the anode electrode terminal and signals applied to the cathode terminal and auxiliary anode electrode terminal, using one anode electrode terminal.
First, the cathode driving circuit 7 outputs an "active low" write pulse SC from a first cathode electrode terminal K1 (hereafter referred to as the "scanning line K1.") to a last cathode electrode terminal Km as shown in FIGS. 16C to 16E. Referring to FIG. 16B, the anode driving circuit 6 outputs a synchronized "active high" write pulse, and video data DK1, DK2, DK3, etc. which corresponds to each scanning line of the anode electrode terminal. Similarly, the auxiliary anode driving circuit 8 outputs an "active high" auxiliary anode pulse synchronized to the write pulse, for priming discharge, to the auxiliary anode electrode terminal as shown in FIG. 16A. The auxiliary anode pulse is output to assure discharge in the anode electrode.
As explained above, the write pulse is successively applied from the scanning line K1 to Km. At the same time, video data corresponding to each cathode of each scanning line is applied to each successive anode electrode terminal, and the auxiliary anode pulse is applied to the auxiliary anode electrode terminal.
Referring to FIG. 16E, the cathode driving circuit 7 then outputs a sustaining pulse during a sustaining period (SUS) after the output of the write pulse. The sustaining pulse is applied to assure discharge in the anode electrode terminal for securely illuminating the plasma display panel. The length of the sustaining period corresponds to the weight of the digital video signal.
FIG. 17 shows an example of the subfield method which repeats write and sustaining operations for displaying the video image in an 8-bit 256 grey-level. In FIG. 17, time is plotted along the abscissa, and the scanning lines K1 to Km are plotted along the ordinate. In this case, a driving period Tk0 in one-field period Tf0 is divided into eight subfields SF1 to SF8. In this example, the length of the sustaining period in a first subfield SF1 corresponds to the MSB (Most Significant Bit), that is 128t (where t is a predetermined unit of period). In other words, the same length of the sustaining period is given to each scanning line from K1 to Km in the same subfield.
After completing the scanning of the first subfield, a second subfield SF2 is scanned. In the second subfield, the anode driving circuit 6 outputs video data to the anode electrode terminal. This video data corresponds to the second significant bit (2nd SB) in the digital video signal of each scanning line. The cathode driving circuit 7 outputs the sustaining pulse to each scanning line during the sustaining period corresponding to the second significant bit (2nd SB) after the write pulse. The length of the sustaining period for the second subfield, that is the second significant bit, is 64t for example. Likewise, the anode driving circuit 6 outputs video data, corresponding to each bit in the digital video signal of each scanning line, to the anode electrode terminal in each subfield. The length of the sustaining period for the third subfield SF3, that is the third significant bit, is 32t for example. For each subfield, the length of the sustaining pulse is set to correspond to the bit weight. In an eighth subfield SF8, the length of the sustaining period is 1t for example.
Accordingly, the conventional video display monitor is capable of displaying a video image in 256 grey-levels by controlling the illumination sustaining period for each pixel to correspond to each digital signal value.
In the above explanation, the conventional video display monitor employs a single scanning system as the driving method. On the other hand, there are video display monitors which employ the double scanning system as the driving method. In the driving method employing the double scanning system, electrodes of the plasma display panel are divided into two groups: an upper group and a lower group. These groups are controlled independently and simultaneously for displaying video images by dividing one field into nine subfields or more. A video display monitor employing the double scanning system is explained next with reference to FIGS. 18, 19, and 20.
FIG. 18 shows the configuration of a video display monitor of the prior art employing the double scanning system. The conventional video display monitor comprises a synchronizing signal separator 1 for separating the video signal, a timing pulse generator 2 for producing a timing pulse in accordance with the synchronizing signal separated by the synchronizing signal separator 1, an A/D converter for converting the video signal to digital signal, a subfield processor 4, a frame memory 5 required for the subfield processor 4, a DC plasma display panel 39 for the double scanning system, an upper anode driving circuit and upper auxiliary anode driving circuit 36 for controlling an upper half of the DC plasma display panel 39, an upper and lower cathode driving circuit 37, and a lower anode driving circuit and lower auxiliary anode driving circuit 38 for controlling a lower half of the DC plasma display panel 39.
In the video display monitor as configured as above, the subfield processor 4 divides one field of the video signal into multiple subfields in order to display video signals in grey levels. Subfield processor 4 then outputs required signals to the upper and lower cathode driving circuit 37, upper anode driving circuit and upper auxiliary anode driving circuit 36, and lower anode driving circuit and lower auxiliary anode driving circuit 38. The operations of the anode electrode, cathode electrode, and auxiliary anode electrode are identical to the single scanning system, and their explanation is not repeated.
In the video display monitor as configured above, the subfield processor 4 implements the following operation with the frame memory 5. The subfield processor 4 converts the input digital video signal for displaying the video signal into grey levels by dividing it into subfields. Subfield processor 4 then outputs the converted signal to the upper anode driving circuit and upper auxiliary anode driving circuit 36, the upper and lower cathode driving circuit 37, and the lower anode driving circuit and lower auxiliary anode driving circuit 38.
FIGS. 19A to 19H show waveforms of the DC plasma display panel driving circuit employing the double scanning system.
The upper and lower cathode driving circuit 37 outputs a write pulse to the cathode electrode terminals on scanning lines K1 to Kn in the upper half of the plasma display panel. At the same time, it outputs the write pulse to cathode electrode terminals on scanning lines K(n+1) to Km. Here, a value n is 2n=m, where m refers to the total number of cathode electrode terminals.
The upper anode driving circuit and upper auxiliary anode driving circuit 36 output video data synchronized to the write pulse, to upper anode electrode terminals, where the video data corresponds to each scanning line. The upper anode driving circuit and upper auxiliary driving circuit 36 also output an auxiliary anode pulse for priming the discharge to the upper auxiliary anode electrode terminals. At the same time, the lower anode driving circuit and lower auxiliary anode driving circuit 38 output video data, corresponding to each scanning line, to the lower anode electrode terminals, and also outputs an auxiliary anode pulse for priming the discharge to lower auxiliary anode electrode terminals. Likewise, the write pulse is successively applied from scanning lines K1 and K(n+1) to Kn and Km. In addition, video data DK1, DK2, DK3, etc. and DK(n+1), DK(n+2), DK(n+3), etc., corresponding to each cathode on each scanning line, are simultaneously applied to anode electrode terminals at the same time, and the auxiliary anode pulse is applied to auxiliary anode electrode terminals.
The upper and lower cathode driving circuit 37 also outputs a sustaining pulse for a sustaining period SUS to each cathode electrode terminal after the write pulse. The sustaining pulse is applied to assure discharge in the anode electrode terminals for securely illuminating the plasma display panel. The length of this sustaing period corresponds to the weight of the digital video signal.
FIG. 20 shows an example of the subfield method for displaying in the 256 grey-level by repeating the above write and sustaining operations. The double scanning system only requires scanning cathode electrode terminals in half of the plasma display panel. Therefore, it is possible to divide one field into nine or more subfields. Accordingly, upper significant bits can be divided into multiple subfields. It is conventionally known that degradation of picture quality, called the moving picture pseudo contour peculiar to the plasma display panel, can be reduced by dividing the upper significant bits into multiple subfields.
In this example, the upper and lower cathode driving circuit 37 outputs the sustaining pulse for the sustaining period corresponding to a quarter of the MSB (128t) in the video signal, that is 32t for example, to the scanning lines K1 to Kn in the upper half screen and the scanning lines K(n+1) to Km in the lower half screen for a first subfield SF1. Then, for a second subfield SF2, the upper and lower cathode driving circuit 37 also output the sustaining pulse of the sustaining period of 32t of the MSB in the video signal. In this example, one field of the video signal is divided into twelve subfields SF1 to SF12. The duration of the sustaining pulse of 4 subfield corresponds to a quarter of the MSB weighted with the value 128 in the digital video signal, followed by half of a second MSB weighted with the value 64 in the next 2 subfields, and a bit weight of the six lower bits in the remaining 6 subfields. Accordingly, the sustaining pulse is output for a period corresponding to a quarter of the MSB for the first subfield to the LSB for the twelfth subfield consecutively. These outputs illuminate each pixel for each video bit, enabling the display of a 256 grey-level signal.
Current video display monitors are required to correspond to a wide range of vertical synchronizing frequencies other than 60 Hz, which is the general vertical synchronizing frequency, in response to different types of input signals. In the conventional configuration as explained above, however, the driving of the first subfield in a next field may start while driving the eighth subfield in the previous field, if the frequency of the vertical synchronizing signal in the video signal is high and a one-field period becomes shorter than the driving period for eight subfields, resulting in unstable driving of the plasma display panel.
If a pulse width of the write pulse and sustaining pulse are shortened or their frequencies are increased to avoid the above disadvantage, a period sufficient for driving the plasma display panel cannot be secured. This also results in unstable on and off operation of the plasma display panel.
If the vertical synchronizing frequency is low, on the other hand, and a one-field period becomes longer, a period for driving the plasma display panel clusters in the first half of one field, and a driving recess period after driving the eighth subfield becomes longer, resulting in noticeable flickering.
Furthermore, in the double scanning system, in addition to the above disadvantages of the single scanning system, the driving of the first subfield in a next field may start while driving the twelfth subfield in the previous field, if one-field period becomes shorter than the driving period for twelve subfields, resulting in unstable driving of the plasma display panel.
If a pulse width of the write pulse and sustaining pulse are shortened or their frequencies are increased to avoid the above disadvantages, a period sufficient for driving the plasma display panel cannot be secured. This also results in unstable on and off operation of the plasma display panel.
If the vertical synchronizing frequency is short, on the other hand, and one-field period becomes longer, a period for driving the plasma display panel clusters at the first half of one field, and a driving recess period after driving the twelfth subfield becomes longer, resulting in noticeable flickering.